[1]孙 鹏,全雪松,杜韵辉,等.doi: 10.3969/j.issn.1001-3849.2026.02.001三维集成电路通孔金属化技术研究进展[J].电镀与精饰,2026,(02):1-18.
　SUN Peng,QUAN Xuesong,DU Yunhui,et al.Research progress on metallization through via technology for 3D integrated circuits[J].Plating & Finishing,2026,(02):1-18.
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doi: 10.3969/j.issn.1001-3849.2026.02.001三维集成电路通孔金属化技术研究进展()

《电镀与精饰》[ISSN:1001-3849/CN:12-1096/TG]

卷:
期数:
2026年02
页码:
1-18
栏目:
出版日期:
2026-02-28

文章信息/Info

Title:
Research progress on metallization through via technology for 3D integrated circuits
作者:
孙 鹏1; 全雪松2; 杜韵辉2; 黎 科2; 钟 毅2; 于大全2; 3
(1. 厦门大学 化学化工学院,福建 厦门 361005 ;2. 厦门大学 电子科学与技术学院,福建 厦门 361005 ;3. 厦门云天半导体科技有限公司,福建 厦门 361013)
Author(s):
SUN Peng1;  QUAN Xuesong2;  DU Yunhui2;  LI Ke2;  ZHONG Yi2;  YU Daquan2; 3
(1. College of Chemistry and Chemical Engineering, Xiamen University, Xiamen 361005, China; 2. School of Electronic Science and Engineering, Xiamen University, Xiamen 361005, China; 3. Xiamen Sky Semiconductor Technology Co., Ltd., Xiamen 361013, China)
关键词:
集成电路; 硅通孔; 玻璃通孔; 电镀填充
Keywords:
integrated circuit (IC);  through-silicon via (TSV);  through-glass via (TGV);  electroplating filling
分类号:
TN405.97；TQ153
文献标志码:
A
摘要:
通孔技术是三维集成电路实现芯片立体堆叠与异质集成的关键互连手段，其性能直接决定了系统级封装在高带宽、低延时及高可靠性方面的表现。硅通孔(TSV)技术成熟，是高性能计算和存储堆叠的主流方案，其核心挑战在于高深宽比下的保形沉积、热机械应力管理及工艺成本控制。玻璃通孔(TGV)作为新兴方案，凭借玻璃基板优异的高频特性、低介电损耗和良好的热匹配性，在射频前端、光电集成等领域展现出独特优势，但其金属与玻璃的界面黏附与通孔填充机制是当前难点。随着通孔技术向高深宽比、高互连密度的方向不断发展，金属化工艺作为通孔电气性能的决定性环节，正从传统物理气相沉积向原子层沉积、化学镀等保形性更优的工艺演进，致力于解决高深宽比(AR＞10﹕1)通孔结构下的均匀性、缺陷控制及界面可靠性问题。本文系统综述了三维集成电路中硅通孔与玻璃通孔金属化工艺的研究进展，重点分析了主流制备方法，并对其未来技术发展趋势进行了展望。
Abstract:
Through-hole technology is a key interconnection method for achieving three-dimensional stacking and heterogeneous integration of chips in three-dimensional integrated circuits, with its performance directly determining the manifestations of system-level packaging in terms of high bandwidth, low latency, and high reliability. Through-silicon via (TSV) technology is mature and serves as the mainstream solution for high-performance computing and storage stacking, with its core challenges lying in conformal deposition under high aspect ratios, thermal-mechanical stress management, and process cost control. Through-glass via (TGV), as an emerging solution, leverages the excellent high-frequency characteristics, lower dielectric loss, and better thermal matching of glass substrates, demonstrating unique advantages in areas such as RF front-end and optoelectronic integration, but the interfacial adhesion between metal and glass, as well as the via filling mechanism, remain current difficulties. As through-hole technology continues to evolve toward high aspect ratios and high interconnection densities, metallization processes, as the decisive link for the electrical performance of through-holes, are advancing from traditional physical vapor deposition to more conformal techniques such as atomic layer deposition and electroless plating, aiming to address issues of uniformity, defect control, and interface reliability in high aspect ratio through-hole structures. This article systematically reviews the research progress on metallization processes for through-silicon vias and through-glass vias in three-dimensional integrated circuits, with a focus on analyzing mainstream preparation methods, and provides an outlook on future technological development trends

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备注/Memo

备注/Memo:
(a) 结构示意图；(b) 实际产品切片；(c) TSV及微凸点结构
更新日期/Last Update: 2026-02-09